Don't rely on UNKNOWN register reset values.
To check a register was updated, a change in value needs to be observed
so do this explicitly rather than relying on the initial value which may
not be well defined.
Change-Id: I1da79c066f5fc76a6d829d07e586d3ebd4de5c1b
diff --git a/test/vmapi/primary_with_secondaries/debug_el1.c b/test/vmapi/primary_with_secondaries/debug_el1.c
index d7d3df1..a6d07a3 100644
--- a/test/vmapi/primary_with_secondaries/debug_el1.c
+++ b/test/vmapi/primary_with_secondaries/debug_el1.c
@@ -91,6 +91,6 @@
{
EXPECT_EQ(hf_vm_get_id(), HF_PRIMARY_VM_ID);
- TRY_WRITE_READ(DBGBCR0_EL1, 0x2);
- TRY_WRITE_READ(DBGBVR0_EL1, 0xf0);
+ CHECK_UPDATE(DBGBCR0_EL1, 0x0, 0x2);
+ CHECK_UPDATE(DBGBVR0_EL1, 0x7, 0xf0);
}
diff --git a/test/vmapi/primary_with_secondaries/perfmon.c b/test/vmapi/primary_with_secondaries/perfmon.c
index 4b5ff53..5d62250 100644
--- a/test/vmapi/primary_with_secondaries/perfmon.c
+++ b/test/vmapi/primary_with_secondaries/perfmon.c
@@ -63,7 +63,7 @@
*/
EXPECT_GE(perf_mon_count, 4);
- TRY_WRITE_READ(PMCCNTR_EL0, 0xaaaa);
+ CHECK_UPDATE(PMCCNTR_EL0, 0x5555, 0xaaaa);
write_msr(PMINTENCLR_EL1, 0xffff);
CHECK_READ(PMINTENSET_EL1, 0);
@@ -104,127 +104,127 @@
FAIL("More performance monitor registers than supported.");
case 30:
TRY_READ(PMEVCNTR30_EL0);
- TRY_WRITE_READ(PMEVTYPER30_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER30_EL0, 0x0, 0x1);
/* fallthrough */
case 29:
TRY_READ(PMEVCNTR29_EL0);
- TRY_WRITE_READ(PMEVTYPER29_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER29_EL0, 0x0, 0x1);
/* fallthrough */
case 28:
TRY_READ(PMEVCNTR28_EL0);
- TRY_WRITE_READ(PMEVTYPER28_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER28_EL0, 0x0, 0x1);
/* fallthrough */
case 27:
TRY_READ(PMEVCNTR27_EL0);
- TRY_WRITE_READ(PMEVTYPER27_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER27_EL0, 0x0, 0x1);
/* fallthrough */
case 26:
TRY_READ(PMEVCNTR26_EL0);
- TRY_WRITE_READ(PMEVTYPER26_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER26_EL0, 0x0, 0x1);
/* fallthrough */
case 25:
TRY_READ(PMEVCNTR25_EL0);
- TRY_WRITE_READ(PMEVTYPER25_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER25_EL0, 0x0, 0x1);
/* fallthrough */
case 24:
TRY_READ(PMEVCNTR24_EL0);
- TRY_WRITE_READ(PMEVTYPER24_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER24_EL0, 0x0, 0x1);
/* fallthrough */
case 23:
TRY_READ(PMEVCNTR23_EL0);
- TRY_WRITE_READ(PMEVTYPER23_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER23_EL0, 0x0, 0x1);
/* fallthrough */
case 22:
TRY_READ(PMEVCNTR22_EL0);
- TRY_WRITE_READ(PMEVTYPER22_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER22_EL0, 0x0, 0x1);
/* fallthrough */
case 21:
TRY_READ(PMEVCNTR21_EL0);
- TRY_WRITE_READ(PMEVTYPER21_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER21_EL0, 0x0, 0x1);
/* fallthrough */
case 20:
TRY_READ(PMEVCNTR20_EL0);
- TRY_WRITE_READ(PMEVTYPER20_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER20_EL0, 0x0, 0x1);
/* fallthrough */
case 19:
TRY_READ(PMEVCNTR19_EL0);
- TRY_WRITE_READ(PMEVTYPER19_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER19_EL0, 0x0, 0x1);
/* fallthrough */
case 18:
TRY_READ(PMEVCNTR18_EL0);
- TRY_WRITE_READ(PMEVTYPER18_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER18_EL0, 0x0, 0x1);
/* fallthrough */
case 17:
TRY_READ(PMEVCNTR17_EL0);
- TRY_WRITE_READ(PMEVTYPER17_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER17_EL0, 0x0, 0x1);
/* fallthrough */
case 16:
TRY_READ(PMEVCNTR16_EL0);
- TRY_WRITE_READ(PMEVTYPER16_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER16_EL0, 0x0, 0x1);
/* fallthrough */
case 15:
TRY_READ(PMEVCNTR15_EL0);
- TRY_WRITE_READ(PMEVTYPER15_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER15_EL0, 0x0, 0x1);
/* fallthrough */
case 14:
TRY_READ(PMEVCNTR14_EL0);
- TRY_WRITE_READ(PMEVTYPER14_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER14_EL0, 0x0, 0x1);
/* fallthrough */
case 13:
TRY_READ(PMEVCNTR13_EL0);
- TRY_WRITE_READ(PMEVTYPER13_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER13_EL0, 0x0, 0x1);
/* fallthrough */
case 12:
TRY_READ(PMEVCNTR12_EL0);
- TRY_WRITE_READ(PMEVTYPER12_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER12_EL0, 0x0, 0x1);
/* fallthrough */
case 11:
TRY_READ(PMEVCNTR11_EL0);
- TRY_WRITE_READ(PMEVTYPER11_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER11_EL0, 0x0, 0x1);
/* fallthrough */
case 10:
TRY_READ(PMEVCNTR10_EL0);
- TRY_WRITE_READ(PMEVTYPER10_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER10_EL0, 0x0, 0x1);
/* fallthrough */
case 9:
TRY_READ(PMEVCNTR9_EL0);
- TRY_WRITE_READ(PMEVTYPER9_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER9_EL0, 0x0, 0x1);
/* fallthrough */
case 8:
TRY_READ(PMEVCNTR8_EL0);
- TRY_WRITE_READ(PMEVTYPER8_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER8_EL0, 0x0, 0x1);
/* fallthrough */
case 7:
TRY_READ(PMEVCNTR7_EL0);
- TRY_WRITE_READ(PMEVTYPER7_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER7_EL0, 0x0, 0x1);
/* fallthrough */
case 6:
TRY_READ(PMEVCNTR6_EL0);
- TRY_WRITE_READ(PMEVTYPER6_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER6_EL0, 0x0, 0x1);
/* fallthrough */
case 5:
TRY_READ(PMEVCNTR5_EL0);
- TRY_WRITE_READ(PMEVTYPER5_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER5_EL0, 0x0, 0x1);
/* fallthrough */
case 4:
TRY_READ(PMEVCNTR4_EL0);
- TRY_WRITE_READ(PMEVTYPER4_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER4_EL0, 0x0, 0x1);
/* fallthrough */
case 3:
TRY_READ(PMEVCNTR3_EL0);
- TRY_WRITE_READ(PMEVTYPER3_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER3_EL0, 0x0, 0x1);
/* fallthrough */
case 2:
TRY_READ(PMEVCNTR2_EL0);
- TRY_WRITE_READ(PMEVTYPER2_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER2_EL0, 0x0, 0x1);
/* fallthrough */
case 1:
TRY_READ(PMEVCNTR1_EL0);
- TRY_WRITE_READ(PMEVTYPER1_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER1_EL0, 0x0, 0x1);
/* fallthrough */
case 0:
TRY_READ(PMEVCNTR0_EL0);
- TRY_WRITE_READ(PMEVTYPER0_EL0, 0x1);
+ CHECK_UPDATE(PMEVTYPER0_EL0, 0x0, 0x1);
break;
}
}
diff --git a/test/vmapi/primary_with_secondaries/sysregs.h b/test/vmapi/primary_with_secondaries/sysregs.h
index 50faab4..920da01 100644
--- a/test/vmapi/primary_with_secondaries/sysregs.h
+++ b/test/vmapi/primary_with_secondaries/sysregs.h
@@ -30,12 +30,20 @@
EXPECT_EQ(x, VALUE); \
} while (0)
-#define TRY_WRITE_READ(REG, VALUE) \
- do { \
- uintreg_t x; \
- x = read_msr(REG); \
- EXPECT_NE(x, VALUE); \
- write_msr(REG, VALUE); \
- x = read_msr(REG); \
- EXPECT_EQ(x, VALUE); \
+/*
+ * Checks that the register can be updated. The first value is written and read
+ * back and then the second value is written and read back. The values must be
+ * different so that success means the register value has been changed and
+ * updated as expected without relying on the initial value of the register.
+ */
+#define CHECK_UPDATE(REG, FROM, TO) \
+ do { \
+ uintreg_t x; \
+ EXPECT_NE(FROM, TO); \
+ write_msr(REG, FROM); \
+ x = read_msr(REG); \
+ EXPECT_EQ(x, FROM); \
+ write_msr(REG, TO); \
+ x = read_msr(REG); \
+ EXPECT_EQ(x, TO); \
} while (0)