Update prebuilt Clang to r365631c1 from Android.
The version we had was segfaulting.
This also requires rebuilding the kernel, as the module ABI isn't stable.
Bug: 132420445
Change-Id: I56234df400f0ad0e0a703b0fbd623772d604b4a6
diff --git a/build/toolchain/BUILD.gn b/build/toolchain/BUILD.gn
index 07a35e2..3a84156 100644
--- a/build/toolchain/BUILD.gn
+++ b/build/toolchain/BUILD.gn
@@ -28,14 +28,14 @@
extra_cflags =
"-nostdinc -isystem" +
rebase_path("//prebuilts/linux-aarch64/musl/include") + " -isystem" +
- rebase_path("//prebuilts/linux-x64/clang/lib64/clang/9.0.3/include") +
+ rebase_path("//prebuilts/linux-x64/clang/lib64/clang/9.0.8/include") +
" -isystem" + rebase_path("//inc/system")
extra_defines = "-D_LIBCPP_HAS_MUSL_LIBC=1 -D_GNU_SOURCE=1"
extra_ldflags = "-no-pie -lc --library-path=" +
rebase_path("//prebuilts/linux-aarch64/musl/lib/") + " " +
rebase_path("//prebuilts/linux-aarch64/musl/lib/crt1.o") +
" " + rebase_path(
- "//prebuilts/linux-x64/clang/lib64/clang/9.0.3/lib/linux/libclang_rt.builtins-aarch64-android.a")
+ "//prebuilts/linux-x64/clang/lib64/clang/9.0.8/lib/linux/libclang_rt.builtins-aarch64-android.a")
toolchain_args = {
use_platform = true
plat_arch = "fake"
diff --git a/build/toolchain/embedded.gni b/build/toolchain/embedded.gni
index 4b067e4..7115956 100644
--- a/build/toolchain/embedded.gni
+++ b/build/toolchain/embedded.gni
@@ -130,7 +130,7 @@
# from the Android prebuilt Clang.
extra_cflags +=
" -target ${invoker.target} -fcolor-diagnostics -nostdinc -isystem" +
- rebase_path("//prebuilts/linux-x64/clang/lib64/clang/9.0.3/include") +
+ rebase_path("//prebuilts/linux-x64/clang/lib64/clang/9.0.8/include") +
" -isystem" + rebase_path("//inc/system")
extra_ldflags +=
" -O2 -lto-O2 --icf=all --fatal-warnings --color-diagnostics"
diff --git a/build/toolchain/gen_offset_size_header.py b/build/toolchain/gen_offset_size_header.py
index 72c4c93..31baa24 100755
--- a/build/toolchain/gen_offset_size_header.py
+++ b/build/toolchain/gen_offset_size_header.py
@@ -43,12 +43,12 @@
parser.add_argument("out_file", help="output file");
args = parser.parse_args()
- # Regex for finding definitions: <HAFNIUM_DEFINE name #value />
- regex = re.compile(r'<HAFNIUM_DEFINE\s([A-Za-z0-9_]+)\s#([0-9]+) />')
+ # Regex for finding definitions: <HAFNIUM_DEFINE name value />
+ regex = re.compile(r'<HAFNIUM_DEFINE\s([A-Za-z0-9_]+)\s([0-9]+) />')
# Extract strings from the input binary file.
stdout = subprocess.check_output([ STRINGS, args.bin_file ])
- stdout = str(stdout).split(os.linesep)
+ stdout = stdout.decode('utf-8').split(os.linesep)
with open(args.out_file, "w") as f:
f.write(PROLOGUE)
diff --git a/inc/hf/offset_size_header.h b/inc/hf/offset_size_header.h
index 7d96950..f35ba3b 100644
--- a/inc/hf/offset_size_header.h
+++ b/inc/hf/offset_size_header.h
@@ -32,7 +32,7 @@
/**
* Emit a function with an embedded string in the format:
- * <HAFNIUM_DEFINE name #value />
+ * <HAFNIUM_DEFINE name value />
* These will be recognized by a script that generates the header file.
*/
#define DEFINE(sym, val) \
diff --git a/prebuilts b/prebuilts
index 2aec8b5..ce0ff4e 160000
--- a/prebuilts
+++ b/prebuilts
@@ -1 +1 @@
-Subproject commit 2aec8b56efced425c5890e574509089ec4f5c8cf
+Subproject commit ce0ff4e3bb78d04d52f4717233706431055d0710
diff --git a/src/arch/aarch64/hftest/interrupts_gicv3.c b/src/arch/aarch64/hftest/interrupts_gicv3.c
index ed6a745..bfbcabe 100644
--- a/src/arch/aarch64/hftest/interrupts_gicv3.c
+++ b/src/arch/aarch64/hftest/interrupts_gicv3.c
@@ -25,7 +25,7 @@
void interrupt_gic_setup(void)
{
- uint32_t ctlr = 1U << 4 /* Enable affinity routing. */
+ uint32_t ctlr = 1U << 4 /* Enable affinity routing. */
| 1U << 1; /* Enable group 1 non-secure interrupts. */
write_msr(ICC_CTLR_EL1, 0);
diff --git a/src/arch/aarch64/hftest/mm.c b/src/arch/aarch64/hftest/mm.c
index 6a17c2f..edfb3a9 100644
--- a/src/arch/aarch64/hftest/mm.c
+++ b/src/arch/aarch64/hftest/mm.c
@@ -80,7 +80,7 @@
(0 << 14) | /* TG0, granule size, 4KB. */
(3 << 12) | /* SH0, inner shareable. */
(1 << 10) | /* ORGN0, normal mem, WB RA WA Cacheable. */
- (1 << 8) | /* IRGN0, normal mem, WB RA WA Cacheable. */
+ (1 << 8) | /* IRGN0, normal mem, WB RA WA Cacheable. */
(25 << 0) | /* T0SZ, input address is 2^39 bytes. */
0;
diff --git a/src/arch/aarch64/inc/hf/arch/spinlock.h b/src/arch/aarch64/inc/hf/arch/spinlock.h
index 2b39a1b..2b71500 100644
--- a/src/arch/aarch64/inc/hf/arch/spinlock.h
+++ b/src/arch/aarch64/inc/hf/arch/spinlock.h
@@ -51,11 +51,11 @@
__asm__ volatile(
" mov %w2, #1\n"
" sevl\n" /* set event bit */
- "1: wfe\n" /* wait for event, clear event bit */
- "2: ldaxr %w1, [%3]\n" /* load lock value */
- " cbnz %w1, 1b\n" /* if lock taken, goto WFE */
+ "1: wfe\n" /* wait for event, clear event bit */
+ "2: ldaxr %w1, [%3]\n" /* load lock value */
+ " cbnz %w1, 1b\n" /* if lock taken, goto WFE */
" stxr %w1, %w2, [%3]\n" /* try to take lock */
- " cbnz %w1, 2b\n" /* loop if unsuccessful */
+ " cbnz %w1, 2b\n" /* loop if unsuccessful */
: "+m"(*l), "=&r"(tmp1), "=&r"(tmp2)
: "r"(l)
: "cc");