Fix my lazy typos.

Change-Id: I21df59fb83d3caf3e006dcdec02bdac126b7f208
diff --git a/inc/hf/arch/barriers.h b/inc/hf/arch/barriers.h
index a22d1d1..f7ef46e 100644
--- a/inc/hf/arch/barriers.h
+++ b/inc/hf/arch/barriers.h
@@ -23,7 +23,7 @@
 void dmb(void);
 
 /**
- * Ensure all explicit memory access and management instructions have completed
+ * Ensures all explicit memory access and management instructions have completed
  * before continuing.
  */
 void dsb(void);
diff --git a/inc/hf/arch/console.h b/inc/hf/arch/console.h
index 94cbaba..5118638 100644
--- a/inc/hf/arch/console.h
+++ b/inc/hf/arch/console.h
@@ -16,5 +16,5 @@
 
 #pragma once
 
-/** Put a single character on the console. */
+/** Puts a single character on the console. */
 void arch_putchar(char c);
diff --git a/inc/hf/arch/mm.h b/inc/hf/arch/mm.h
index 0939498..fea5f65 100644
--- a/inc/hf/arch/mm.h
+++ b/inc/hf/arch/mm.h
@@ -36,7 +36,7 @@
 pte_t arch_mm_absent_pte(uint8_t level);
 
 /**
- * Createa a table PTE.
+ * Creates a table PTE.
  */
 pte_t arch_mm_table_pte(uint8_t level, paddr_t pa);
 
@@ -46,7 +46,7 @@
 pte_t arch_mm_block_pte(uint8_t level, paddr_t pa, uint64_t attrs);
 
 /**
- * Chceks whether a block is allowed at the given level of the page table.
+ * Checks whether a block is allowed at the given level of the page table.
  */
 bool arch_mm_is_block_allowed(uint8_t level);
 
@@ -81,33 +81,33 @@
 paddr_t arch_mm_clear_pa(paddr_t pa);
 
 /**
- * Extracts the start address if the PTE range.
+ * Extracts the start address of the PTE range.
  */
 paddr_t arch_mm_block_from_pte(pte_t pte, uint8_t level);
 
 /**
- * Extracts the address of the table referenced by the PTE/.
+ * Extracts the address of the table referenced by the PTE.
  */
 paddr_t arch_mm_table_from_pte(pte_t pte, uint8_t level);
 
 /**
- * Extracts the atrobutes of the PTE.
+ * Extracts the attributes of the PTE.
  */
 uint64_t arch_mm_pte_attrs(pte_t pte, uint8_t level);
 
 /**
- * Merge the attributes of a block into those of its containing table.
+ * Merges the attributes of a block into those of its containing table.
  */
 uint64_t arch_mm_combine_table_entry_attrs(uint64_t table_attrs,
 					   uint64_t block_attrs);
 
 /**
- * Invalidates hte given range of stage-1 TLB.
+ * Invalidates the given range of stage-1 TLB.
  */
 void arch_mm_invalidate_stage1_range(vaddr_t va_begin, vaddr_t va_end);
 
 /**
- * Invalidates hte given range of stage-2 TLB.
+ * Invalidates the given range of stage-2 TLB.
  */
 void arch_mm_invalidate_stage2_range(ipaddr_t va_begin, ipaddr_t va_end);
 
@@ -118,7 +118,7 @@
 void arch_mm_write_back_dcache(void *base, size_t size);
 
 /**
- * Gets teh maximum level allowed in the page table for the given mode.
+ * Gets the maximum level allowed in the page table for the given mode.
  */
 uint8_t arch_mm_max_level(int mode);
 
@@ -134,6 +134,6 @@
 uint64_t arch_mm_mode_to_attrs(int mode);
 
 /**
- * Initialized the arch specific memory management state.
+ * Initializes the arch specific memory management state.
  */
 bool arch_mm_init(paddr_t table, bool first);
diff --git a/src/arch/aarch64/barriers.c b/src/arch/aarch64/barriers.c
index 14721fb..2e3d0db 100644
--- a/src/arch/aarch64/barriers.c
+++ b/src/arch/aarch64/barriers.c
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+#include "hf/arch/barriers.h"
+
 void dmb(void)
 {
 	__asm__ volatile("dmb sy");
diff --git a/src/arch/aarch64/cpu.c b/src/arch/aarch64/cpu.c
index 49ab032..c13bbf3 100644
--- a/src/arch/aarch64/cpu.c
+++ b/src/arch/aarch64/cpu.c
@@ -14,6 +14,8 @@
  * limitations under the License.
  */
 
+#include "hf/arch/cpu.h"
+
 #include <stdbool.h>
 #include <stddef.h>
 #include <stdint.h>
diff --git a/src/arch/aarch64/msr.h b/src/arch/aarch64/msr.h
index 2eeda06..d55a110 100644
--- a/src/arch/aarch64/msr.h
+++ b/src/arch/aarch64/msr.h
@@ -18,7 +18,7 @@
 
 #include <stddef.h>
 
-#include <hf/arch/cpu.h>
+#include "hf/arch/cpu.h"
 
 #define read_msr(name)                                          \
 	__extension__({                                         \
diff --git a/src/arch/fake/cpu.c b/src/arch/fake/cpu.c
index afd9cd5..ab400d2 100644
--- a/src/arch/fake/cpu.c
+++ b/src/arch/fake/cpu.c
@@ -14,7 +14,7 @@
  * limitations under the License.
  */
 
-#include <hf/arch/cpu.h>
+#include "hf/arch/cpu.h"
 
 void arch_irq_disable(void)
 {