Use the minimum cache line size when flushing the cache.
CTR_EL0 holds the minimum data cache line size which is what we need to
ensure all data to written back to memory. Previously, only the line
size for a specific cache was used and which cache that was wasn't even
being selected.
Change-Id: Id67e9efba61775b9b21591bb80a7855af472704c
diff --git a/src/arch/aarch64/mm.c b/src/arch/aarch64/mm.c
index 3730999..946f069 100644
--- a/src/arch/aarch64/mm.c
+++ b/src/arch/aarch64/mm.c
@@ -91,7 +91,7 @@
void arch_mm_write_back_dcache(void *base, size_t size)
{
/* Clean each data cache line the corresponds to data in the range. */
- uint16_t line_size = 1 << ((read_msr(CCSIDR_EL1) & 0x7) + 4);
+ uint16_t line_size = 1 << ((read_msr(CTR_EL0) >> 16) & 0xf);
uintptr_t line_begin = (uintptr_t)base & ~(line_size - 1);
uintptr_t end = (uintptr_t)base + size;
while (line_begin < end) {
