Update TF-A prebuilt, add RPi4 binary
RPi4 support has been merged to the master branch but no stable release
has been published since. Update TF-A with a build of the master branch
for the time being.
Bug: 140223574
Change-Id: I1452f12a50381f9524bb24a60bb1802947117177
diff --git a/linux-aarch64/arm-trusted-firmware/LICENSE b/linux-aarch64/arm-trusted-firmware/LICENSE
index a4464d9..2f97043 100644
--- a/linux-aarch64/arm-trusted-firmware/LICENSE
+++ b/linux-aarch64/arm-trusted-firmware/LICENSE
@@ -1,33 +1,42 @@
-Copyright (c) 2013-2018, Arm Limited and Contributors. All rights reserved.
+License
+=======
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
+The software is provided under a BSD-3-Clause license (below). Contributions to
+this project are accepted under the same license with developer sign-off as
+described in the :ref:`Contributor's Guide`.
-- Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
+::
-- Redistributions in binary form must reproduce the above copyright notice, this
- list of conditions and the following disclaimer in the documentation and/or
- other materials provided with the distribution.
+ Copyright (c) [XXXX-]YYYY, <OWNER>. All rights reserved.
-- Neither the name of Arm nor the names of its contributors may be used to
- endorse or promote products derived from this software without specific prior
- written permission.
+ Redistribution and use in source and binary forms, with or without modification,
+ are permitted provided that the following conditions are met:
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ - Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
---------------
+ - Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
-Note:
+ - Neither the name of Arm nor the names of its contributors may be used to
+ endorse or promote products derived from this software without specific
+ prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+SPDX Identifiers
+----------------
+
Individual files contain the following tag instead of the full license text.
::
@@ -36,3 +45,36 @@
This enables machine processing of license information based on the SPDX
License Identifiers that are here available: http://spdx.org/licenses/
+
+
+Other Projects
+--------------
+
+This project contains code from other projects as listed below. The original
+license text is included in those source files.
+
+- The libc source code is derived from `FreeBSD`_ and `SCC`_. FreeBSD uses
+ various BSD licenses, including BSD-3-Clause and BSD-2-Clause. The SCC code
+ is used under the BSD-3-Clause license with the author's permission.
+
+- The libfdt source code is disjunctively dual licensed
+ (GPL-2.0+ OR BSD-2-Clause). It is used by this project under the terms of
+ the BSD-2-Clause license. Any contributions to this code must be made under
+ the terms of both licenses.
+
+- The LLVM compiler-rt source code is disjunctively dual licensed
+ (NCSA OR MIT). It is used by this project under the terms of the NCSA
+ license (also known as the University of Illinois/NCSA Open Source License),
+ which is a permissive license compatible with BSD-3-Clause. Any
+ contributions to this code must be made under the terms of both licenses.
+
+- The zlib source code is licensed under the Zlib license, which is a
+ permissive license compatible with BSD-3-Clause.
+
+- Some STMicroelectronics platform source code is disjunctively dual licensed
+ (GPL-2.0+ OR BSD-3-Clause). It is used by this project under the terms of the
+ BSD-3-Clause license. Any contributions to this code must be made under the
+ terms of both licenses.
+
+.. _FreeBSD: http://www.freebsd.org
+.. _SCC: http://www.simple-cc.org/
diff --git a/linux-aarch64/arm-trusted-firmware/METADATA b/linux-aarch64/arm-trusted-firmware/METADATA
index 7c92807..c342ce4 100644
--- a/linux-aarch64/arm-trusted-firmware/METADATA
+++ b/linux-aarch64/arm-trusted-firmware/METADATA
@@ -10,7 +10,7 @@
type: GIT
value: "https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git"
}
- version: "2.0"
- last_upgrade_date { year: 2019 month: 03 day: 20 }
+ version: "2.1-867-gcc76d670"
+ last_upgrade_date { year: 2019 month: 10 day: 30 }
license_type: NOTICE
}
diff --git a/linux-aarch64/arm-trusted-firmware/README.md b/linux-aarch64/arm-trusted-firmware/README.md
index baf6543..7f943ad 100644
--- a/linux-aarch64/arm-trusted-firmware/README.md
+++ b/linux-aarch64/arm-trusted-firmware/README.md
@@ -2,7 +2,9 @@
```
$ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=fvp FVP_HW_CONFIG_DTS=fdts/fvp-base-gicv3-psci-1t.dts PRELOADED_BL33_BASE=0x80000000 ARM_LINUX_KERNEL_AS_BL33=1 ARM_PRELOADED_DTB_BASE=0x82000000 RESET_TO_BL31=1 ENABLE_PIE=0 V=1 all fip -j16
-$ cp build/fvp/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/
+$ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rpi4 -j16
+$ cp build/fvp/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/fvp/bl31.bin
+$ cp build/rpi4/release/bl31.bin ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/rpi4/bl31.bin
$ cp license.rst ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/LICENSE
-$ dtc -I dtb -O dts build/fvp/release/fdts/fvp-base-gicv3-psci-1t.dtb -o ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/fvp-base-gicv3-psci-1t.dts
+$ dtc -I dtb -O dts build/fvp/release/fdts/fvp-base-gicv3-psci-1t.dtb -o ../hafnium/prebuilts/linux-aarch64/arm-trusted-firmware/fvp/fvp-base-gicv3-psci-1t.dts
```
diff --git a/linux-aarch64/arm-trusted-firmware/bl31.bin b/linux-aarch64/arm-trusted-firmware/bl31.bin
deleted file mode 100755
index 559f814..0000000
--- a/linux-aarch64/arm-trusted-firmware/bl31.bin
+++ /dev/null
Binary files differ
diff --git a/linux-aarch64/arm-trusted-firmware/fvp-base-gicv3-psci-1t.dts b/linux-aarch64/arm-trusted-firmware/fvp-base-gicv3-psci-1t.dts
deleted file mode 100644
index b32ed68..0000000
--- a/linux-aarch64/arm-trusted-firmware/fvp-base-gicv3-psci-1t.dts
+++ /dev/null
@@ -1,489 +0,0 @@
-/dts-v1/;
-
-/memreserve/ 0x0000000080000000 0x0000000000010000;
-/ {
- model = "FVP Base";
- compatible = "arm,vfp-base", "arm,vexpress";
- interrupt-parent = <0x1>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
-
- chosen {
- };
-
- aliases {
- serial0 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@90000";
- serial1 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@a0000";
- serial2 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@b0000";
- serial3 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@c0000";
- };
-
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
- method = "smc";
- cpu_suspend = <0xc4000001>;
- cpu_off = <0x84000002>;
- cpu_on = <0xc4000003>;
- sys_poweroff = <0x84000008>;
- sys_reset = <0x84000009>;
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu-map {
-
- cluster0 {
-
- core0 {
- cpu = <0x2>;
- };
-
- core1 {
- cpu = <0x3>;
- };
-
- core2 {
- cpu = <0x4>;
- };
-
- core3 {
- cpu = <0x5>;
- };
- };
-
- cluster1 {
-
- core0 {
- cpu = <0x6>;
- };
-
- core1 {
- cpu = <0x7>;
- };
-
- core2 {
- cpu = <0x8>;
- };
-
- core3 {
- cpu = <0x9>;
- };
- };
- };
-
- idle-states {
- entry-method = "arm,psci";
-
- cpu-sleep-0 {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x10000>;
- entry-latency-us = <0x28>;
- exit-latency-us = <0x64>;
- min-residency-us = <0x96>;
- phandle = <0xa>;
- };
-
- cluster-sleep-0 {
- compatible = "arm,idle-state";
- local-timer-stop;
- arm,psci-suspend-param = <0x1010000>;
- entry-latency-us = <0x1f4>;
- exit-latency-us = <0x3e8>;
- min-residency-us = <0x9c4>;
- phandle = <0xb>;
- };
- };
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x0>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x2>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x100>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x3>;
- };
-
- cpu@2 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x200>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x4>;
- };
-
- cpu@3 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x300>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x5>;
- };
-
- cpu@100 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10000>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x6>;
- };
-
- cpu@101 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10100>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x7>;
- };
-
- cpu@102 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10200>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x8>;
- };
-
- cpu@103 {
- device_type = "cpu";
- compatible = "arm,armv8";
- reg = <0x0 0x10300>;
- enable-method = "psci";
- cpu-idle-states = <0xa 0xb>;
- next-level-cache = <0xc>;
- phandle = <0x9>;
- };
-
- l2-cache0 {
- compatible = "cache";
- phandle = <0xc>;
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x0 0x7f000000 0x8 0x80000000 0x0 0x80000000>;
- };
-
- interrupt-controller@2f000000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <0x3>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- ranges;
- interrupt-controller;
- reg = <0x0 0x2f000000 0x0 0x10000 0x0 0x2f100000 0x0 0x200000 0x0 0x2c000000 0x0 0x2000 0x0 0x2c010000 0x0 0x2000 0x0 0x2c02f000 0x0 0x2000>;
- interrupts = <0x1 0x9 0x4>;
- phandle = <0x1>;
-
- its@2f020000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- reg = <0x0 0x2f020000 0x0 0x20000>;
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
- clock-frequency = <0x5f5e100>;
- };
-
- timer@2a810000 {
- compatible = "arm,armv7-timer-mem";
- reg = <0x0 0x2a810000 0x0 0x10000>;
- clock-frequency = <0x5f5e100>;
- #address-cells = <0x2>;
- #size-cells = <0x2>;
- ranges;
-
- frame@2a830000 {
- frame-number = <0x1>;
- interrupts = <0x0 0x1a 0x4>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
- };
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <0x0 0x3c 0x4 0x0 0x3d 0x4 0x0 0x3e 0x4 0x0 0x3f 0x4>;
- };
-
- smb@0,0 {
- compatible = "simple-bus";
- #address-cells = <0x2>;
- #size-cells = <0x1>;
- ranges = <0x0 0x0 0x0 0x8000000 0x4000000 0x1 0x0 0x0 0x14000000 0x4000000 0x2 0x0 0x0 0x18000000 0x4000000 0x3 0x0 0x0 0x1c000000 0x4000000 0x4 0x0 0x0 0xc000000 0x4000000 0x5 0x0 0x0 0x10000000 0x4000000>;
-
- motherboard {
- arm,v2m-memory-map = "rs1";
- compatible = "arm,vexpress,v2m-p1", "simple-bus";
- #address-cells = <0x2>;
- #size-cells = <0x1>;
- ranges;
-
- flash@0,00000000 {
- compatible = "arm,vexpress-flash", "cfi-flash";
- reg = <0x0 0x0 0x4000000 0x4 0x0 0x4000000>;
- bank-width = <0x4>;
- };
-
- vram@2,00000000 {
- compatible = "arm,vexpress-vram";
- reg = <0x2 0x0 0x800000>;
- };
-
- ethernet@2,02000000 {
- compatible = "smsc,lan91c111";
- reg = <0x2 0x2000000 0x10000>;
- interrupts = <0x0 0xf 0x4>;
- };
-
- clk24mhz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0x16e3600>;
- clock-output-names = "v2m:clk24mhz";
- phandle = <0xf>;
- };
-
- refclk1mhz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0xf4240>;
- clock-output-names = "v2m:refclk1mhz";
- phandle = <0xe>;
- };
-
- refclk32khz {
- compatible = "fixed-clock";
- #clock-cells = <0x0>;
- clock-frequency = <0x8000>;
- clock-output-names = "v2m:refclk32khz";
- phandle = <0xd>;
- };
-
- iofpga@3,00000000 {
- compatible = "arm,amba-bus", "simple-bus";
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- ranges = <0x0 0x3 0x0 0x200000>;
-
- sysreg@10000 {
- compatible = "arm,vexpress-sysreg";
- reg = <0x10000 0x1000>;
- gpio-controller;
- #gpio-cells = <0x2>;
- phandle = <0x10>;
- };
-
- sysctl@20000 {
- compatible = "arm,sp810", "arm,primecell";
- reg = <0x20000 0x1000>;
- clocks = <0xd 0xe 0xf>;
- clock-names = "refclk", "timclk", "apb_pclk";
- #clock-cells = <0x1>;
- clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
- phandle = <0x12>;
- };
-
- aaci@40000 {
- compatible = "arm,pl041", "arm,primecell";
- reg = <0x40000 0x1000>;
- interrupts = <0x0 0xb 0x4>;
- clocks = <0xf>;
- clock-names = "apb_pclk";
- };
-
- mmci@50000 {
- compatible = "arm,pl180", "arm,primecell";
- reg = <0x50000 0x1000>;
- interrupts = <0x0 0x9 0x4 0x0 0xa 0x4>;
- cd-gpios = <0x10 0x0 0x0>;
- wp-gpios = <0x10 0x1 0x0>;
- max-frequency = <0xb71b00>;
- vmmc-supply = <0x11>;
- clocks = <0xf 0xf>;
- clock-names = "mclk", "apb_pclk";
- };
-
- kmi@60000 {
- compatible = "arm,pl050", "arm,primecell";
- reg = <0x60000 0x1000>;
- interrupts = <0x0 0xc 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "KMIREFCLK", "apb_pclk";
- };
-
- kmi@70000 {
- compatible = "arm,pl050", "arm,primecell";
- reg = <0x70000 0x1000>;
- interrupts = <0x0 0xd 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "KMIREFCLK", "apb_pclk";
- };
-
- uart@90000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0x90000 0x1000>;
- interrupts = <0x0 0x5 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@a0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xa0000 0x1000>;
- interrupts = <0x0 0x6 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@b0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xb0000 0x1000>;
- interrupts = <0x0 0x7 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- uart@c0000 {
- compatible = "arm,pl011", "arm,primecell";
- reg = <0xc0000 0x1000>;
- interrupts = <0x0 0x8 0x4>;
- clocks = <0xf 0xf>;
- clock-names = "uartclk", "apb_pclk";
- };
-
- wdt@f0000 {
- compatible = "arm,sp805", "arm,primecell";
- reg = <0xf0000 0x1000>;
- interrupts = <0x0 0x0 0x4>;
- clocks = <0xd 0xf>;
- clock-names = "wdogclk", "apb_pclk";
- };
-
- timer@110000 {
- compatible = "arm,sp804", "arm,primecell";
- reg = <0x110000 0x1000>;
- interrupts = <0x0 0x2 0x4>;
- clocks = <0x12 0x0 0x12 0x1 0xf>;
- clock-names = "timclken1", "timclken2", "apb_pclk";
- };
-
- timer@120000 {
- compatible = "arm,sp804", "arm,primecell";
- reg = <0x120000 0x1000>;
- interrupts = <0x0 0x3 0x4>;
- clocks = <0x12 0x2 0x12 0x3 0xf>;
- clock-names = "timclken1", "timclken2", "apb_pclk";
- };
-
- rtc@170000 {
- compatible = "arm,pl031", "arm,primecell";
- reg = <0x170000 0x1000>;
- interrupts = <0x0 0x4 0x4>;
- clocks = <0xf>;
- clock-names = "apb_pclk";
- };
-
- clcd@1f0000 {
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x1f0000 0x1000>;
- interrupts = <0x0 0xe 0x4>;
- clocks = <0x13 0xf>;
- clock-names = "clcdclk", "apb_pclk";
- mode = "XVGA";
- use_dma = <0x0>;
- framebuffer = <0x18000000 0x180000>;
- };
-
- virtio_block@130000 {
- compatible = "virtio,mmio";
- reg = <0x130000 0x1000>;
- interrupts = <0x0 0x2a 0x4>;
- };
- };
-
- fixedregulator {
- compatible = "regulator-fixed";
- regulator-name = "3V3";
- regulator-min-microvolt = <0x325aa0>;
- regulator-max-microvolt = <0x325aa0>;
- regulator-always-on;
- phandle = <0x11>;
- };
-
- mcc {
- compatible = "arm,vexpress,config-bus", "simple-bus";
- arm,vexpress,config-bridge = <0x10>;
-
- osc {
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <0x1 0x1>;
- freq-range = <0x16a6570 0x3c8eee0>;
- #clock-cells = <0x0>;
- clock-output-names = "v2m:oscclk1";
- phandle = <0x13>;
- };
-
- muxfpga {
- compatible = "arm,vexpress-muxfpga";
- arm,vexpress-sysreg,func = <0x7 0x0>;
- };
-
- dvimode {
- compatible = "arm,vexpress-dvimode";
- arm,vexpress-sysreg,func = <0xb 0x0>;
- };
- };
- };
- };
-
- panels {
-
- panel {
- compatible = "panel";
- mode = "XVGA";
- refresh = <0x3c>;
- xres = <0x400>;
- yres = <0x300>;
- pixclock = <0x3d84>;
- left_margin = <0x98>;
- right_margin = <0x30>;
- upper_margin = <0x17>;
- lower_margin = <0x3>;
- hsync_len = <0x68>;
- vsync_len = <0x4>;
- sync = <0x0>;
- vmode = "FB_VMODE_NONINTERLACED";
- tim2 = "TIM2_BCD", "TIM2_IPC";
- cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
- caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
- bpp = <0x10>;
- };
- };
-};
diff --git a/linux-aarch64/arm-trusted-firmware/fvp/bl31.bin b/linux-aarch64/arm-trusted-firmware/fvp/bl31.bin
new file mode 100755
index 0000000..4eca548
--- /dev/null
+++ b/linux-aarch64/arm-trusted-firmware/fvp/bl31.bin
Binary files differ
diff --git a/linux-aarch64/arm-trusted-firmware/fvp/fvp-base-gicv3-psci-1t.dts b/linux-aarch64/arm-trusted-firmware/fvp/fvp-base-gicv3-psci-1t.dts
new file mode 100644
index 0000000..e2cdc53
--- /dev/null
+++ b/linux-aarch64/arm-trusted-firmware/fvp/fvp-base-gicv3-psci-1t.dts
@@ -0,0 +1,489 @@
+/dts-v1/;
+
+/memreserve/ 0x0000000080000000 0x0000000000010000;
+/ {
+ model = "FVP Base";
+ compatible = "arm,vfp-base\0arm,vexpress";
+ interrupt-parent = < 0x01 >;
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x02 >;
+
+ chosen {
+ };
+
+ aliases {
+ serial0 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@90000";
+ serial1 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@a0000";
+ serial2 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@b0000";
+ serial3 = "/smb@0,0/motherboard/iofpga@3,00000000/uart@c0000";
+ };
+
+ psci {
+ compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci";
+ method = "smc";
+ cpu_suspend = < 0xc4000001 >;
+ cpu_off = < 0x84000002 >;
+ cpu_on = < 0xc4000003 >;
+ sys_poweroff = < 0x84000008 >;
+ sys_reset = < 0x84000009 >;
+ };
+
+ cpus {
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x00 >;
+
+ cpu-map {
+
+ cluster0 {
+
+ core0 {
+ cpu = < 0x02 >;
+ };
+
+ core1 {
+ cpu = < 0x03 >;
+ };
+
+ core2 {
+ cpu = < 0x04 >;
+ };
+
+ core3 {
+ cpu = < 0x05 >;
+ };
+ };
+
+ cluster1 {
+
+ core0 {
+ cpu = < 0x06 >;
+ };
+
+ core1 {
+ cpu = < 0x07 >;
+ };
+
+ core2 {
+ cpu = < 0x08 >;
+ };
+
+ core3 {
+ cpu = < 0x09 >;
+ };
+ };
+ };
+
+ idle-states {
+ entry-method = "arm,psci";
+
+ cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = < 0x10000 >;
+ entry-latency-us = < 0x28 >;
+ exit-latency-us = < 0x64 >;
+ min-residency-us = < 0x96 >;
+ phandle = < 0x0a >;
+ };
+
+ cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = < 0x1010000 >;
+ entry-latency-us = < 0x1f4 >;
+ exit-latency-us = < 0x3e8 >;
+ min-residency-us = < 0x9c4 >;
+ phandle = < 0x0b >;
+ };
+ };
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x00 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x02 >;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x100 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x03 >;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x200 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x04 >;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x300 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x05 >;
+ };
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x10000 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x06 >;
+ };
+
+ cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x10100 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x07 >;
+ };
+
+ cpu@102 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x10200 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x08 >;
+ };
+
+ cpu@103 {
+ device_type = "cpu";
+ compatible = "arm,armv8";
+ reg = < 0x00 0x10300 >;
+ enable-method = "psci";
+ cpu-idle-states = < 0x0a 0x0b >;
+ next-level-cache = < 0x0c >;
+ phandle = < 0x09 >;
+ };
+
+ l2-cache0 {
+ compatible = "cache";
+ phandle = < 0x0c >;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = < 0x00 0x80000000 0x00 0x7f000000 0x08 0x80000000 0x00 0x80000000 >;
+ };
+
+ interrupt-controller@2f000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = < 0x03 >;
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x02 >;
+ ranges;
+ interrupt-controller;
+ reg = < 0x00 0x2f000000 0x00 0x10000 0x00 0x2f100000 0x00 0x200000 0x00 0x2c000000 0x00 0x2000 0x00 0x2c010000 0x00 0x2000 0x00 0x2c02f000 0x00 0x2000 >;
+ interrupts = < 0x01 0x09 0x04 >;
+ phandle = < 0x01 >;
+
+ its@2f020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = < 0x00 0x2f020000 0x00 0x20000 >;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = < 0x01 0x0d 0xff01 0x01 0x0e 0xff01 0x01 0x0b 0xff01 0x01 0x0a 0xff01 >;
+ clock-frequency = < 0x5f5e100 >;
+ };
+
+ timer@2a810000 {
+ compatible = "arm,armv7-timer-mem";
+ reg = < 0x00 0x2a810000 0x00 0x10000 >;
+ clock-frequency = < 0x5f5e100 >;
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x02 >;
+ ranges;
+
+ frame@2a830000 {
+ frame-number = < 0x01 >;
+ interrupts = < 0x00 0x1a 0x04 >;
+ reg = < 0x00 0x2a830000 0x00 0x10000 >;
+ };
+ };
+
+ pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = < 0x00 0x3c 0x04 0x00 0x3d 0x04 0x00 0x3e 0x04 0x00 0x3f 0x04 >;
+ };
+
+ smb@0,0 {
+ compatible = "simple-bus";
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x01 >;
+ ranges = < 0x00 0x00 0x00 0x8000000 0x4000000 0x01 0x00 0x00 0x14000000 0x4000000 0x02 0x00 0x00 0x18000000 0x4000000 0x03 0x00 0x00 0x1c000000 0x4000000 0x04 0x00 0x00 0xc000000 0x4000000 0x05 0x00 0x00 0x10000000 0x4000000 >;
+
+ motherboard {
+ arm,v2m-memory-map = "rs1";
+ compatible = "arm,vexpress,v2m-p1\0simple-bus";
+ #address-cells = < 0x02 >;
+ #size-cells = < 0x01 >;
+ ranges;
+
+ flash@0,00000000 {
+ compatible = "arm,vexpress-flash\0cfi-flash";
+ reg = < 0x00 0x00 0x4000000 0x04 0x00 0x4000000 >;
+ bank-width = < 0x04 >;
+ };
+
+ vram@2,00000000 {
+ compatible = "arm,vexpress-vram";
+ reg = < 0x02 0x00 0x800000 >;
+ };
+
+ ethernet@2,02000000 {
+ compatible = "smsc,lan91c111";
+ reg = < 0x02 0x2000000 0x10000 >;
+ interrupts = < 0x00 0x0f 0x04 >;
+ };
+
+ clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = < 0x00 >;
+ clock-frequency = < 0x16e3600 >;
+ clock-output-names = "v2m:clk24mhz";
+ phandle = < 0x0f >;
+ };
+
+ refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = < 0x00 >;
+ clock-frequency = < 0xf4240 >;
+ clock-output-names = "v2m:refclk1mhz";
+ phandle = < 0x0e >;
+ };
+
+ refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = < 0x00 >;
+ clock-frequency = < 0x8000 >;
+ clock-output-names = "v2m:refclk32khz";
+ phandle = < 0x0d >;
+ };
+
+ iofpga@3,00000000 {
+ compatible = "arm,amba-bus\0simple-bus";
+ #address-cells = < 0x01 >;
+ #size-cells = < 0x01 >;
+ ranges = < 0x00 0x03 0x00 0x200000 >;
+
+ sysreg@10000 {
+ compatible = "arm,vexpress-sysreg";
+ reg = < 0x10000 0x1000 >;
+ gpio-controller;
+ #gpio-cells = < 0x02 >;
+ phandle = < 0x10 >;
+ };
+
+ sysctl@20000 {
+ compatible = "arm,sp810\0arm,primecell";
+ reg = < 0x20000 0x1000 >;
+ clocks = < 0x0d 0x0e 0x0f >;
+ clock-names = "refclk\0timclk\0apb_pclk";
+ #clock-cells = < 0x01 >;
+ clock-output-names = "timerclken0\0timerclken1\0timerclken2\0timerclken3";
+ phandle = < 0x12 >;
+ };
+
+ aaci@40000 {
+ compatible = "arm,pl041\0arm,primecell";
+ reg = < 0x40000 0x1000 >;
+ interrupts = < 0x00 0x0b 0x04 >;
+ clocks = < 0x0f >;
+ clock-names = "apb_pclk";
+ };
+
+ mmci@50000 {
+ compatible = "arm,pl180\0arm,primecell";
+ reg = < 0x50000 0x1000 >;
+ interrupts = < 0x00 0x09 0x04 0x00 0x0a 0x04 >;
+ cd-gpios = < 0x10 0x00 0x00 >;
+ wp-gpios = < 0x10 0x01 0x00 >;
+ max-frequency = < 0xb71b00 >;
+ vmmc-supply = < 0x11 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "mclk\0apb_pclk";
+ };
+
+ kmi@60000 {
+ compatible = "arm,pl050\0arm,primecell";
+ reg = < 0x60000 0x1000 >;
+ interrupts = < 0x00 0x0c 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "KMIREFCLK\0apb_pclk";
+ };
+
+ kmi@70000 {
+ compatible = "arm,pl050\0arm,primecell";
+ reg = < 0x70000 0x1000 >;
+ interrupts = < 0x00 0x0d 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "KMIREFCLK\0apb_pclk";
+ };
+
+ uart@90000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = < 0x90000 0x1000 >;
+ interrupts = < 0x00 0x05 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ uart@a0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = < 0xa0000 0x1000 >;
+ interrupts = < 0x00 0x06 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ uart@b0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = < 0xb0000 0x1000 >;
+ interrupts = < 0x00 0x07 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ uart@c0000 {
+ compatible = "arm,pl011\0arm,primecell";
+ reg = < 0xc0000 0x1000 >;
+ interrupts = < 0x00 0x08 0x04 >;
+ clocks = < 0x0f 0x0f >;
+ clock-names = "uartclk\0apb_pclk";
+ };
+
+ wdt@f0000 {
+ compatible = "arm,sp805\0arm,primecell";
+ reg = < 0xf0000 0x1000 >;
+ interrupts = < 0x00 0x00 0x04 >;
+ clocks = < 0x0d 0x0f >;
+ clock-names = "wdogclk\0apb_pclk";
+ };
+
+ timer@110000 {
+ compatible = "arm,sp804\0arm,primecell";
+ reg = < 0x110000 0x1000 >;
+ interrupts = < 0x00 0x02 0x04 >;
+ clocks = < 0x12 0x00 0x12 0x01 0x0f >;
+ clock-names = "timclken1\0timclken2\0apb_pclk";
+ };
+
+ timer@120000 {
+ compatible = "arm,sp804\0arm,primecell";
+ reg = < 0x120000 0x1000 >;
+ interrupts = < 0x00 0x03 0x04 >;
+ clocks = < 0x12 0x02 0x12 0x03 0x0f >;
+ clock-names = "timclken1\0timclken2\0apb_pclk";
+ };
+
+ rtc@170000 {
+ compatible = "arm,pl031\0arm,primecell";
+ reg = < 0x170000 0x1000 >;
+ interrupts = < 0x00 0x04 0x04 >;
+ clocks = < 0x0f >;
+ clock-names = "apb_pclk";
+ };
+
+ clcd@1f0000 {
+ compatible = "arm,pl111\0arm,primecell";
+ reg = < 0x1f0000 0x1000 >;
+ interrupts = < 0x00 0x0e 0x04 >;
+ clocks = < 0x13 0x0f >;
+ clock-names = "clcdclk\0apb_pclk";
+ mode = "XVGA";
+ use_dma = < 0x00 >;
+ framebuffer = < 0x18000000 0x180000 >;
+ };
+
+ virtio_block@130000 {
+ compatible = "virtio,mmio";
+ reg = < 0x130000 0x1000 >;
+ interrupts = < 0x00 0x2a 0x04 >;
+ };
+ };
+
+ fixedregulator {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = < 0x325aa0 >;
+ regulator-max-microvolt = < 0x325aa0 >;
+ regulator-always-on;
+ phandle = < 0x11 >;
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus\0simple-bus";
+ arm,vexpress,config-bridge = < 0x10 >;
+
+ osc {
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = < 0x01 0x01 >;
+ freq-range = < 0x16a6570 0x3c8eee0 >;
+ #clock-cells = < 0x00 >;
+ clock-output-names = "v2m:oscclk1";
+ phandle = < 0x13 >;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = < 0x07 0x00 >;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = < 0x0b 0x00 >;
+ };
+ };
+ };
+ };
+
+ panels {
+
+ panel {
+ compatible = "panel";
+ mode = "XVGA";
+ refresh = < 0x3c >;
+ xres = < 0x400 >;
+ yres = < 0x300 >;
+ pixclock = < 0x3d84 >;
+ left_margin = < 0x98 >;
+ right_margin = < 0x30 >;
+ upper_margin = < 0x17 >;
+ lower_margin = < 0x03 >;
+ hsync_len = < 0x68 >;
+ vsync_len = < 0x04 >;
+ sync = < 0x00 >;
+ vmode = "FB_VMODE_NONINTERLACED";
+ tim2 = "TIM2_BCD\0TIM2_IPC";
+ cntl = "CNTL_LCDTFT\0CNTL_BGR\0CNTL_LCDVCOMP(1)";
+ caps = "CLCD_CAP_5551\0CLCD_CAP_565\0CLCD_CAP_888";
+ bpp = < 0x10 >;
+ };
+ };
+};
diff --git a/linux-aarch64/arm-trusted-firmware/rpi4/bl31.bin b/linux-aarch64/arm-trusted-firmware/rpi4/bl31.bin
new file mode 100755
index 0000000..39938a8
--- /dev/null
+++ b/linux-aarch64/arm-trusted-firmware/rpi4/bl31.bin
Binary files differ
