| I2C for Hisilicon hix5hd2 chipset platform |
| |
| Required properties: |
| - compatible: Must be "hisilicon,hix5hd2-i2c" |
| - reg: physical base address of the controller and length of memory mapped |
| region. |
| - interrupts: interrupt number to the cpu. |
| - #address-cells = <1>; |
| - #size-cells = <0>; |
| - clocks: phandles to input clocks. |
| |
| Optional properties: |
| - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000 |
| - Child nodes conforming to i2c bus binding |
| |
| Examples: |
| I2C0@f8b10000 { |
| compatible = "hisilicon,hix5hd2-i2c"; |
| reg = <0xf8b10000 0x1000>; |
| interrupts = <0 38 4>; |
| clocks = <&clock HIX5HD2_I2C0_RST>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| } |
