Make all TLB flushes apply to inner-shareable PEs
Change-Id: I6e61d3a7e1cdf64f18119e946758923cec9764fb
diff --git a/src/arch/aarch64/mm.c b/src/arch/aarch64/mm.c
index 1106aa6..471c323 100644
--- a/src/arch/aarch64/mm.c
+++ b/src/arch/aarch64/mm.c
@@ -269,7 +269,7 @@
if (VM_TOOLCHAIN == 1) {
tlbi(vmalle1is);
} else {
- tlbi(alle2);
+ tlbi(alle2is);
}
} else {
begin >>= 12;
@@ -317,7 +317,7 @@
* Invalidate all stage-1 and stage-2 entries of the TLB for
* the current VMID.
*/
- tlbi(vmalls12e1);
+ tlbi(vmalls12e1is);
} else {
begin >>= 12;
end >>= 12;
@@ -329,7 +329,7 @@
*/
for (it = begin; it < end;
it += (UINT64_C(1) << (PAGE_BITS - 12))) {
- tlbi_reg(ipas2e1, it);
+ tlbi_reg(ipas2e1is, it);
}
/*
