[REFACTOR] Remove extra spaces
Change-Id: I315addc8efa31b6681b53bb44c764277590c4005
diff --git a/build/image/image.ld b/build/image/image.ld
index c42ab5f..ec5f316 100644
--- a/build/image/image.ld
+++ b/build/image/image.ld
@@ -54,7 +54,7 @@
/*
* Collect together read-only data including relocations at the end
- * which are applied by the entry code. This is page aligned so it can
+ * which are applied by the entry code. This is page aligned so it can
* be mapped as read-only and non-executable.
*/
. = ALIGN(4096);
diff --git a/src/arch/aarch64/hypervisor/feature_id.c b/src/arch/aarch64/hypervisor/feature_id.c
index 20e6f55..c305b1c 100644
--- a/src/arch/aarch64/hypervisor/feature_id.c
+++ b/src/arch/aarch64/hypervisor/feature_id.c
@@ -228,7 +228,7 @@
}
if (features & HF_FEATURE_PAUTH) {
- /* APK and API bits *enable* trapping when cleared. */
+ /* APK and API bits *enable* trapping when cleared. */
regs->lazy.hcr_el2 &= ~(HCR_EL2_APK | HCR_EL2_API);
vm->arch.tid3_masks.id_aa64isar1_el1 &= ~ID_AA64ISAR1_EL1_GPI;
diff --git a/src/arch/aarch64/hypervisor/perfmon.c b/src/arch/aarch64/hypervisor/perfmon.c
index 5be27ae..9aea3ff 100644
--- a/src/arch/aarch64/hypervisor/perfmon.c
+++ b/src/arch/aarch64/hypervisor/perfmon.c
@@ -229,7 +229,7 @@
uintreg_t perfmon_get_pmccfiltr_el0_init_value(spci_vm_id_t vm_id)
{
if (vm_id != HF_PRIMARY_VM_ID) {
- /* Disable cycle counting for secondary VMs. */
+ /* Disable cycle counting for secondary VMs. */
return PMCCFILTR_EL0_P | PMCCFILTR_EL0_U;
}
diff --git a/src/arch/aarch64/inc/hf/arch/types.h b/src/arch/aarch64/inc/hf/arch/types.h
index 667fc20..2ecd722 100644
--- a/src/arch/aarch64/inc/hf/arch/types.h
+++ b/src/arch/aarch64/inc/hf/arch/types.h
@@ -81,7 +81,7 @@
} tid3_masks;
};
-/** Type to represent the register state of a vCPU. */
+/** Type to represent the register state of a vCPU. */
struct arch_regs {
/* General purpose registers. */
uintreg_t r[NUM_GP_REGS];
diff --git a/src/arch/aarch64/sysregs.c b/src/arch/aarch64/sysregs.c
index df300fd..8f807a0 100644
--- a/src/arch/aarch64/sysregs.c
+++ b/src/arch/aarch64/sysregs.c
@@ -156,7 +156,7 @@
*/
sctlr_el2_value |= SCTLR_EL2_IESB;
- /* MMU-related bits. */
+ /* MMU-related bits. */
sctlr_el2_value |= SCTLR_EL2_M;
sctlr_el2_value |= SCTLR_EL2_A;
sctlr_el2_value |= SCTLR_EL2_C;
diff --git a/src/arch/aarch64/sysregs.h b/src/arch/aarch64/sysregs.h
index bf8f084..8e4ca00 100644
--- a/src/arch/aarch64/sysregs.h
+++ b/src/arch/aarch64/sysregs.h
@@ -372,8 +372,8 @@
/**
* Protected Table Walk.
* When set a translation table access made as part of a stage 1 translation
- * table walk is subject to a stage 2 translation. The memory access generates
- * a stage 2 permission fault.
+ * table walk is subject to a stage 2 translation. The memory access generates a
+ * stage 2 permission fault.
*/
#define HCR_EL2_PTW (UINT64_C(0x1) << 2)
diff --git a/src/arch/fake/inc/hf/arch/types.h b/src/arch/fake/inc/hf/arch/types.h
index 4cb5be4..d87890c 100644
--- a/src/arch/fake/inc/hf/arch/types.h
+++ b/src/arch/fake/inc/hf/arch/types.h
@@ -44,7 +44,7 @@
void *dummy;
};
-/** Type to represent the register state of a VM. */
+/** Type to represent the register state of a VM. */
struct arch_regs {
uintreg_t arg[8];
cpu_id_t vcpu_id;
diff --git a/src/load.c b/src/load.c
index d69b36d..a8bb759 100644
--- a/src/load.c
+++ b/src/load.c
@@ -101,7 +101,7 @@
{
vm->smc_whitelist = manifest_vm->smc_whitelist;
- /* Initialize architecture-specific features. */
+ /* Initialize architecture-specific features. */
arch_vm_features_set(vm);
return true;
